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Commit b8a65a3b authored by Julien Massot's avatar Julien Massot Committed by Martyn Welch
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update gmsl patches

parent 009f0a6c
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2 merge requests!244Update GMSL patches,!200Draft: d/patches: Use an overlay for the rpi 7" touch screen
Showing with 3001 additions and 1293 deletions
......@@ -791,6 +791,9 @@ CONFIG_CEC_MESON_G12A_AO=m
## file: drivers/media/i2c/Kconfig
##
CONFIG_VIDEO_MAXIM_GMSL2=m
CONFIG_VIDEO_MAXIM_GMSL2_DES=m
CONFIG_VIDEO_MAXIM_GMSL2_SER=m
CONFIG_VIDEO_ST_VGXY61=m
##
## file: drivers/media/platform/amlogic/meson-ge2d/Kconfig
......
From f439f422a26dad42328d8cbfca5c7e37ac1968a3 Mon Sep 17 00:00:00 2001
From: Julien Massot <julien.massot@collabora.com>
Date: Wed, 3 May 2023 09:28:14 +0200
Subject: [PATCH 4/6] media: platform: cadence: use asd fwnode
On some subdev the fwnode is the device node and not the endpoint node.
Using the subdev fwnode doesn't allow to fetch the subdev
pad we are connected to.
---
drivers/media/platform/cadence/cdns-csi2rx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/media/platform/cadence/cdns-csi2rx.c b/drivers/media/platform/cadence/cdns-csi2rx.c
index 1c7541a2b6..51aa68c7cf 100644
--- a/drivers/media/platform/cadence/cdns-csi2rx.c
+++ b/drivers/media/platform/cadence/cdns-csi2rx.c
@@ -494,7 +494,7 @@ static int csi2rx_async_bound(struct v4l2_async_notifier *notifier,
struct csi2rx_priv *csi2rx = v4l2_subdev_to_csi2rx(subdev);
csi2rx->source_pad = media_entity_get_fwnode_pad(&s_subdev->entity,
- s_subdev->fwnode,
+ asd->match.fwnode,
MEDIA_PAD_FL_SOURCE);
if (csi2rx->source_pad < 0) {
dev_err(csi2rx->dev, "Couldn't find output pad for subdev %s\n",
--
2.40.1
From: Julien Massot <julien.massot@collabora.com>
Date: Thu, 23 Mar 2023 12:05:47 +0100
Subject: max-gmsl2-deser: report link frequency
Report the link frequency by implementing the V4L2_CID_LINK_FREQ
control.
---
drivers/media/i2c/max-gmsl2-deser.c | 40 +++++++++++++++++--------------------
1 file changed, 18 insertions(+), 22 deletions(-)
diff --git a/drivers/media/i2c/max-gmsl2-deser.c b/drivers/media/i2c/max-gmsl2-deser.c
index 8a30110..79a4211 100644
--- a/drivers/media/i2c/max-gmsl2-deser.c
+++ b/drivers/media/i2c/max-gmsl2-deser.c
@@ -98,7 +98,7 @@ struct max_gmsl2_deser_csi {
struct v4l2_subdev_format format;
struct max_gmsl2_deser_priv *priv;
struct regmap_field *phy_enable;
- struct regmap_field *phy_out_freq[2];
+ struct regmap_field *phy_out_freq;
struct regmap_field *lane_polarities[2];
struct regmap_field *lane_map[2];
u8 id;
@@ -130,6 +130,7 @@ struct max_gmsl2_deser_priv {
struct regmap_field *gmsl1_link_locked[GMSL2_MAX_LINK];
struct regmap_field *gmsl1_forward_cc[GMSL2_MAX_LINK];
struct dentry *dbg_dir;
+ s64 tx_link_freq[1];
};
#define GMSL2_INVALID_REG_FIELD REG_FIELD(0, 0, 0)
@@ -485,13 +486,9 @@ static int max_gmsl2_deser_init_regmap(struct max_gmsl2_deser_priv *priv)
field = &data->csi_phy_enable[i];
csi->phy_enable = devm_regmap_field_alloc(dev, priv->regmap, *field);
- field = &data->csi_phy_out_freq[i*2];
+ field = &data->csi_phy_out_freq[i == 0 ? 1 : 2];
if (field->reg)
- csi->phy_out_freq[0] = devm_regmap_field_alloc(dev, priv->regmap, *field);
-
- field = &data->csi_phy_out_freq[i * 2 + 1];
- if (field->reg)
- csi->phy_out_freq[1] = devm_regmap_field_alloc(dev, priv->regmap, *field);
+ csi->phy_out_freq = devm_regmap_field_alloc(dev, priv->regmap, *field);
field = &data->csi_lane_polarities[i * 2];
csi->lane_polarities[0] = devm_regmap_field_alloc(dev, priv->regmap, *field);
@@ -679,7 +676,7 @@ static int max_gmsl2_deser_state_show(struct seq_file *seq, void *p)
struct max_gmsl2_deser_priv *priv = seq->private;
struct max_gmsl2_deser_pipe *pipe;
struct max_gmsl2_deser_csi *csi;
- unsigned int link_locked, enable, stream_id, link_sel, vid_lock, bpp, dt, vc, freq1, freq2, dphy_en, link_mode;
+ unsigned int link_locked, enable, stream_id, link_sel, vid_lock, bpp, dt, vc, freq, dphy_en, link_mode;
u8 link, pipeid, csiid;
int ret;
@@ -752,18 +749,16 @@ static int max_gmsl2_deser_state_show(struct seq_file *seq, void *p)
for_each_csi(csiid, priv) {
csi = &priv->csi[csiid];
- ret = regmap_field_read(csi->phy_out_freq[0], &freq1);
- if (ret)
- break;
- ret = regmap_field_read(csi->phy_out_freq[1], &freq2);
+ ret = regmap_field_read(csi->phy_out_freq, &freq);
if (ret)
break;
ret = regmap_field_read(csi->phy_enable, &dphy_en);
if (ret)
break;
- seq_printf(seq, "CSI%d: freq DPHY[%d]:%dMHz enabled:%u DPHY[%d]:%dMHz enabled:%u\n", csiid,
- csiid * 2 , freq1 * 100, (dphy_en & BIT(0)) == BIT(0),
- csiid * 2 + 1, freq2 * 100, (dphy_en & BIT(1)) == BIT(1));
+ seq_printf(seq, "CSI%d: freq:%dMHz DPHY[%d] enabled:%u DPHY[%d] enabled:%u\n", csiid,
+ freq * 100,
+ csiid * 2 , (dphy_en & BIT(0)) == BIT(0),
+ csiid * 2 + 1, (dphy_en & BIT(1)) == BIT(1));
}
return ret;
@@ -953,6 +948,11 @@ static int max_gmsl2_deser_csi_init_controls(struct max_gmsl2_deser_csi *csi)
&max_gmsl2_deser_csi_ctrl_ops,
V4L2_CID_PIXEL_RATE, 1, INT_MAX,
1, 1);
+
+ v4l2_ctrl_new_int_menu(&csi->ctrl_hdl, NULL, V4L2_CID_LINK_FREQ,
+ ARRAY_SIZE(csi->priv->tx_link_freq) - 1, 0,
+ csi->priv->tx_link_freq);
+
if (csi->priv->data->patgen_base_addr[0])
v4l2_ctrl_new_std_menu_items(&csi->ctrl_hdl,
&max_gmsl2_deser_csi_ctrl_ops,
@@ -1172,17 +1172,13 @@ static int max_gmsl2_deser_csi_init(struct max_gmsl2_deser_priv *priv, u8 csi_id
/* FIXME: take value from dt, written value in multiple of 100MHz
* Only the master DPhy might need to be set.
*/
- if (csi->phy_out_freq[0]) {
- ret = regmap_field_write(csi->phy_out_freq[0], 8);
+ if (csi->phy_out_freq) {
+ ret = regmap_field_write(csi->phy_out_freq, 8);
if (ret)
return ret;
}
+ priv->tx_link_freq[0] = 8 * 100000000;
- if (csi->phy_out_freq[1]) {
- ret = regmap_field_write(csi->phy_out_freq[1], 8);
- if (ret)
- return ret;
- }
csi->format.format.width = 1280;
csi->format.format.height = 720;
csi->format.format.code = MEDIA_BUS_FMT_RGB888_1X24;
From: Julien Massot <julien.massot@collabora.com>
Date: Thu, 23 Mar 2023 12:06:39 +0100
Subject: max-gmsl2-deser: do not try to link non existing pipe
---
drivers/media/i2c/max-gmsl2-deser.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/media/i2c/max-gmsl2-deser.c b/drivers/media/i2c/max-gmsl2-deser.c
index 79a4211..fe3f724 100644
--- a/drivers/media/i2c/max-gmsl2-deser.c
+++ b/drivers/media/i2c/max-gmsl2-deser.c
@@ -980,7 +980,9 @@ static int max_gmsl2_deser_csi_registered(struct v4l2_subdev *sd)
dev_info(dev, "Registered CSI%u %s", csi->id, sd->name);
- if (csi->id == 0)
+ if (priv->data->pipes == 1)
+ pipe = &priv->pipes[0];
+ else if (csi->id == 0)
/* Pipe Y goes to CSI0 */
pipe = &priv->pipes[1];
else
From: Julien Massot <julien.massot@collabora.com>
Date: Thu, 20 Apr 2023 14:22:53 +0200
Subject: drivers: media: max-gmsl2-deser: fix pattern generator
The pattern generator needs to force the csi clock output, and
also requires that the deserializer is in pixel mode.
Save the intial tunnel mode on device startup and switch the
device to pixel mode when pattern generator is enabled.
When pattern generator is disabled we restore the initial
settings.
Also fix the link frequency reporting which is half the Bps
(two bytes per clock period).
---
drivers/media/i2c/max-gmsl2-deser.c | 61 +++++++++++++++++++++++++++++++++++--
1 file changed, 58 insertions(+), 3 deletions(-)
diff --git a/drivers/media/i2c/max-gmsl2-deser.c b/drivers/media/i2c/max-gmsl2-deser.c
index fe3f724..36ef82a 100644
--- a/drivers/media/i2c/max-gmsl2-deser.c
+++ b/drivers/media/i2c/max-gmsl2-deser.c
@@ -39,6 +39,7 @@ struct max_gmsl2_deser_data {
u8 csi;
struct reg_field dev_rev;
struct reg_field csi_enable;
+ struct reg_field csi_out_force_en;
struct reg_field csi_wait_frame;
struct reg_field csi_phy_enable[GMSL2_MAX_CSI];
/* Each CSI 4 lanes use 2 phys for lane polarities and lane map
@@ -67,6 +68,7 @@ struct max_gmsl2_deser_data {
struct reg_field reset_link[GMSL2_MAX_LINK];
/* GMSL1 backward compatibility */
const struct max_gmsl2_compat_gmsl1 *gmsl1;
+ struct reg_field tunnel_mode;
};
/* VC[7:6] DT[5:0] */
@@ -119,6 +121,8 @@ struct max_gmsl2_deser_priv {
struct regmap_field *dev_rev;
u8 csi_use_cnt;
struct regmap_field *csi_enable;
+ /* In case of pattern generation we might have to force the csi output*/
+ struct regmap_field *csi_out_force_en;
/* wait a new frame before generating a MIPI packet */
struct regmap_field *csi_wait_frame;
struct regmap_field *pattern_clk_freq;
@@ -129,6 +133,8 @@ struct max_gmsl2_deser_priv {
struct regmap_field *gmsl1_highimm[GMSL2_MAX_LINK];
struct regmap_field *gmsl1_link_locked[GMSL2_MAX_LINK];
struct regmap_field *gmsl1_forward_cc[GMSL2_MAX_LINK];
+ struct regmap_field *tunnel_mode;
+ bool tunnel_mode_saved;
struct dentry *dbg_dir;
s64 tx_link_freq[1];
};
@@ -209,6 +215,7 @@ const struct max_gmsl2_deser_data max96714_data = {
.dev_rev = REG_FIELD(0xe, 0, 3),
.csi_enable = REG_FIELD(0x313, 1, 1),
.csi_wait_frame = REG_FIELD(0x325, 7, 7),
+ .csi_out_force_en = REG_FIELD(0x330, 7, 7),
.csi_phy_enable = { REG_FIELD(0x332, 4, 5) },
.csi_phy_out_freq = { GMSL2_INVALID_REG_FIELD, REG_FIELD(0x320, 0, 4), },
.csi_lane_polarities = { REG_FIELD(0x335, 0, 2), REG_FIELD(0x335, 3, 5) },
@@ -232,6 +239,7 @@ const struct max_gmsl2_deser_data max96714_data = {
.reset_link = { REG_FIELD(0x10, 6, 6) },
/* This device is backward compatible with GMSL1 */
.gmsl1 = &max96714_gmsl1_data,
+ .tunnel_mode = REG_FIELD(0x474, 0, 0),
};
#define IS_MAX96714(priv) (priv->data->device_id == MAX96714_DEVICE_ID)
@@ -511,6 +519,16 @@ static int max_gmsl2_deser_init_regmap(struct max_gmsl2_deser_priv *priv)
priv->csi_enable =
devm_regmap_field_alloc(dev, priv->regmap, *field);
+ field = &data->csi_out_force_en;
+ if (field->reg)
+ priv->csi_out_force_en =
+ devm_regmap_field_alloc(dev, priv->regmap, *field);
+
+ field = &data->tunnel_mode;
+ if (field->reg)
+ priv->tunnel_mode =
+ devm_regmap_field_alloc(dev, priv->regmap, *field);
+
field = &data->csi_wait_frame;
if (field->reg)
priv->csi_wait_frame =
@@ -817,6 +835,22 @@ static int max_gmsl2_deser_csi_s_ctrl_pattern(struct max_gmsl2_deser_csi *csi, i
ret = pipes_clear_remap(priv);
if (ret)
return ret;
+
+ /* Tunnel mode should be disabled for pattern generator */
+ if (priv->tunnel_mode) {
+ ret = regmap_field_write(priv->tunnel_mode, 0);
+ if (ret)
+ return ret;
+ }
+
+ if (priv->csi_out_force_en) {
+ /* Force CSI output clock for use in MIPI
+ * loopback test or pattern generator use.*/
+ ret = regmap_field_write(priv->csi_out_force_en, 1);
+ if (ret)
+ return ret;
+ }
+
} else {
/* Restore CSI to Pipe mapping */
ret = pipes_clear_remap(priv);
@@ -830,9 +864,19 @@ static int max_gmsl2_deser_csi_s_ctrl_pattern(struct max_gmsl2_deser_csi *csi, i
ret = max_gmsl2_vtg_disable(priv->regmap, patgen_base);
if (ret)
return ret;
+ /* Restore tunnel mode */
+ if (priv->tunnel_mode && priv->tunnel_mode_saved) {
+ ret = regmap_field_write(priv->tunnel_mode, 1);
+ if (ret)
+ return ret;
+ }
+ if (priv->csi_out_force_en) {
+ ret = regmap_field_write(priv->csi_out_force_en, 0);
+ if (ret)
+ return ret;
+ }
}
-
return 0;
}
@@ -1179,7 +1223,8 @@ static int max_gmsl2_deser_csi_init(struct max_gmsl2_deser_priv *priv, u8 csi_id
if (ret)
return ret;
}
- priv->tx_link_freq[0] = 8 * 100000000;
+ /* The link frequency is half the Bps and DPLL freq. */
+ priv->tx_link_freq[0] = 4 * 100000000;
csi->format.format.width = 1280;
csi->format.format.height = 720;
@@ -1498,7 +1543,7 @@ static int max_gmsl2_init_links(struct max_gmsl2_deser_priv *priv)
static int max_gmsl2_deser_probe(struct i2c_client *client)
{
struct max_gmsl2_deser_priv *priv;
- unsigned int dev_id, dev_rev;
+ unsigned int dev_id, dev_rev, val;
int i;
int ret;
@@ -1548,6 +1593,16 @@ static int max_gmsl2_deser_probe(struct i2c_client *client)
dev_info(&client->dev, "GMSL2 deserializer device_id: 0x%02x rev: 0x%01x", dev_id, dev_rev);
i2c_set_clientdata(client, priv);
+
+ /* Save tunnel mode we might have to disable it later for pattern generator */
+ if (priv->tunnel_mode) {
+ ret = regmap_field_read(priv->tunnel_mode, &val);
+ if (ret)
+ return ret;
+
+ priv->tunnel_mode_saved = !!val;
+ }
+
ret = max_gmsl2_init_links(priv);
if (ret)
return ret;
From 9be6f8a20ec2092ae1c5cb13a8ba00ad6da1a1bb Mon Sep 17 00:00:00 2001
From: Julien Massot <julien.massot@collabora.com>
Date: Thu, 20 Apr 2023 22:15:29 +0200
Subject: [PATCH 2/2] max-gmsl2-deser: change max96714 compatible to max96714f
The device used for testing is a max96714f and not a max96714,
the only change in the registers is the device id: 0xca instead
of 0xc9.
We may need to support several device id for the same registers
definition in the future.
---
drivers/media/i2c/max-gmsl2-deser.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/media/i2c/max-gmsl2-deser.c b/drivers/media/i2c/max-gmsl2-deser.c
index 36ef82a493..3df540e7ec 100644
--- a/drivers/media/i2c/max-gmsl2-deser.c
+++ b/drivers/media/i2c/max-gmsl2-deser.c
@@ -206,9 +206,9 @@ const struct max_gmsl2_compat_gmsl1 max96714_gmsl1_data = {
.link_lock = { REG_FIELD(0xbcb, 0, 0) },
};
-#define MAX96714_DEVICE_ID 0xc9
-const struct max_gmsl2_deser_data max96714_data = {
- .device_id = MAX96714_DEVICE_ID,
+#define MAX96714F_DEVICE_ID 0xca
+const struct max_gmsl2_deser_data max96714f_data = {
+ .device_id = MAX96714F_DEVICE_ID,
.pipes = 1,
.links = 1,
.csi = 1,
@@ -242,7 +242,7 @@ const struct max_gmsl2_deser_data max96714_data = {
.tunnel_mode = REG_FIELD(0x474, 0, 0),
};
-#define IS_MAX96714(priv) (priv->data->device_id == MAX96714_DEVICE_ID)
+#define IS_MAX96714F(priv) (priv->data->device_id == MAX96714F_DEVICE_ID)
#define MAX96914_DEVICE_ID 0xa0
@@ -429,8 +429,8 @@ static const char* device_id_to_name(u8 device_id)
return "max96934";
case MAX96914_DEVICE_ID:
return "max96914";
- case MAX96714_DEVICE_ID:
- return "max96714";
+ case MAX96714F_DEVICE_ID:
+ return "max96714f";
default:
break;
}
@@ -1624,7 +1624,7 @@ static void max_gmsl2_deser_remove(struct i2c_client *client)
static const struct of_device_id max_gmsl2_deser_of_ids[] = {
{ .compatible = "maxim,max96934", .data = &max96934_data },
{ .compatible = "maxim,max96914", .data = &max96914_data },
- { .compatible = "maxim,max96714", .data = &max96714_data },
+ { .compatible = "maxim,max96714f", .data = &max96714f_data },
{ }
};
MODULE_DEVICE_TABLE(of, max_gmsl2_deser_of_ids);
--
2.39.2
From: fvz1brg <francisco.vaz@pt.bosch.com>
Date: Thu, 27 Apr 2023 09:54:40 +0000
Subject: Add raw8 video formats
---
drivers/media/platform/cadence/cdns-csi2rx.c | 20 +++++++++++++++
.../media/platform/ti/j721e-csi2rx/j721e-csi2rx.c | 30 +++++++++++++++++++---
2 files changed, 47 insertions(+), 3 deletions(-)
diff --git a/drivers/media/platform/cadence/cdns-csi2rx.c b/drivers/media/platform/cadence/cdns-csi2rx.c
index 7800ded..18d5db9 100644
--- a/drivers/media/platform/cadence/cdns-csi2rx.c
+++ b/drivers/media/platform/cadence/cdns-csi2rx.c
@@ -123,6 +123,26 @@ static const struct csi2rx_fmt formats[] = {
.code = MEDIA_BUS_FMT_RGB888_1X24,
.bpp = 24,
},
+ {
+ .code = MEDIA_BUS_FMT_SBGGR8_1X8,
+ .bpp = 8,
+ },
+ {
+ .code = MEDIA_BUS_FMT_SGBRG8_1X8,
+ .bpp = 8,
+ },
+ {
+ .code = MEDIA_BUS_FMT_SGRBG8_1X8,
+ .bpp = 8,
+ },
+ {
+ .code = MEDIA_BUS_FMT_SRGGB8_1X8,
+ .bpp = 8,
+ },
+ {
+ .code = MEDIA_BUS_FMT_Y8_1X8,
+ .bpp = 8,
+ },
};
static const struct csi2rx_fmt *csi2rx_get_fmt_by_code(u32 code)
diff --git a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
index 395b610..1af7b0b 100644
--- a/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
+++ b/drivers/media/platform/ti/j721e-csi2rx/j721e-csi2rx.c
@@ -118,13 +118,37 @@ static const struct ti_csi2rx_fmt formats[] = {
.code = MEDIA_BUS_FMT_VYUY8_1X16,
.csi_dt = MIPI_CSI2_DT_YUV422_8B,
.bpp = 16,
- },
- {
+ }, {
.fourcc = V4L2_PIX_FMT_RGB24,
.code = MEDIA_BUS_FMT_RGB888_1X24,
.csi_dt = MIPI_CSI2_DT_RGB888,
.bpp = 24,
- },
+ }, {
+ .fourcc = V4L2_PIX_FMT_SBGGR8,
+ .code = MEDIA_BUS_FMT_SBGGR8_1X8,
+ .csi_dt = MIPI_CSI2_DT_RAW8,
+ .bpp = 8,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SGBRG8,
+ .code = MEDIA_BUS_FMT_SGBRG8_1X8,
+ .csi_dt = MIPI_CSI2_DT_RAW8,
+ .bpp = 8,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SGRBG8,
+ .code = MEDIA_BUS_FMT_SGRBG8_1X8,
+ .csi_dt = MIPI_CSI2_DT_RAW8,
+ .bpp = 8,
+ }, {
+ .fourcc = V4L2_PIX_FMT_SRGGB8,
+ .code = MEDIA_BUS_FMT_SRGGB8_1X8,
+ .csi_dt = MIPI_CSI2_DT_RAW8,
+ .bpp = 8,
+ }, {
+ .fourcc = V4L2_PIX_FMT_GREY,
+ .code = MEDIA_BUS_FMT_Y8_1X8,
+ .csi_dt = MIPI_CSI2_DT_RAW8,
+ .bpp = 8,
+ },
/* More formats can be supported but they are not listed for now. */
};
......@@ -212,14 +212,11 @@ apertis/am62x/0158-Add-memory-region-and-mailbox-configuration-for-r5f-.patch
# Support for Maxim GMSL devices
apertis/maxim-gmsl2/0001-drivers-media-add-maxim-GMSL2-deserializer-driver.patch
apertis/maxim-gmsl2/0151-max-gmsl2-deser-report-link-frequency.patch
apertis/maxim-gmsl2/0152-max-gmsl2-deser-do-not-try-to-link-non-existing-pipe.patch
apertis/maxim-gmsl2/0153-drivers-media-max-gmsl2-deser-fix-pattern-generator.patch
apertis/maxim-gmsl2/0154-max-gmsl2-deser-change-max96714-compatible-to-max967.patch
# Additional video capture format
apertis/am62x-csi/0153-csi2rx-add-RGB-format.patch
apertis/am62x-csi/0159-media-platform-ti-j721e-csi2rx-add-missing-MIPI-DT-f.patch
apertis/am62x-csi/0160-media-platform-cadence-use-asd-fwnode.patch
# Backport of VGXY61 camera driver
apertis/st-vgxy61/0162-media-i2c-Add-driver-for-ST-VGXY61-camera-sensor.patch
......@@ -228,4 +225,4 @@ apertis/st-vgxy61/0164-media-i2c-st-vgxy61-Fix-smatch-warnings.patch
apertis/st-vgxy61/0165-media-i2c-st-vgxy61-Use-asm-intead-of-asm-generic.patch
apertis/st-vgxy61/0166-media-v4l-Add-1X16-16-bit-greyscale-media-bus-code-d.patch
apertis/st-vgxy61/0167-media-v4l-ctrls-Add-a-control-for-HDR-mode.patch
apertis/st-vgxy61/0168-Add-raw8-video-formats.patch
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